A semiconductor wafer or substrate can be made with a variety of base substrate materials, such as silicon (Si), germanium, aluminum nitride (AlN), gallium arsenide (GaAs), gallium nitride (GaN), aluminum gallium nitride over gallium nitride (AlGaN/GaN), indium phosphide, silicon carbide (SiC), or other bulk material for structural support. A plurality of semiconductor die is formed on the wafer separated by a non-active, inter-die substrate area or saw street. The saw street provides cutting areas to singulate the semiconductor wafer into individual semiconductor die.
In some cases, the semiconductor die are singulated from the semiconductor wafer and then individually packaged for electrical interconnect and encapsulation for environmental isolation. For small, common technology semiconductor die, such as a small signal diode, the die-level semiconductor packaging cost is often significantly greater than the cost of the die.
To reduce packaging cost, the semiconductor die can be packaged while in wafer form, e.g., in a wafer level chip scale package (WLCSP). Once in package form, the semiconductor die are separated from the wafer. WLCSP provides lower cost, reduces package size, and enhances thermal conduction characteristics. In WLCSP, the spacing between adjacent semiconductor die must be sufficiently large to perform the packaging operations, e.g., encapsulation and electrical interconnect while leaving sufficient scribe line width for singulation of the packaged die.
In one known double-encapsulation WLCSP process, a plurality of bumps is formed on the active surface of the semiconductor die while in wafer form. A channel or trench is cut partially into the bulk substrate in the scribe line of the semiconductor wafer between the die by a wide saw blade. A first encapsulant is deposited over the active surface of the semiconductor die and into the channel. A portion of the first encapsulant is removed by a grinding operation to expose the bumps. A portion of the base substrate material is removed from a back surface, opposite the active surface, in a grinding operation to thin the wafer and expose the first encapsulant in the channel. A second encapsulant is deposited over the back surface of the semiconductor die and first encapsulant. The encapsulated semiconductor die are then singulated leaving the first encapsulant on the side surface of the semiconductor die and the second encapsulant on the back surface. The double-encapsulation WLCSP process requires a large inter-die spacing, which can approach the die size, and many processing steps. The large inter-die spacing reduces the die yield per wafer and increases overall manufacturing cost.
In another WLCSP, a single encapsulant is deposited on the back surface and side surfaces of the semiconductor die. The single encapsulation WLCSP process still requires a large inter-die spacing in order to deposit encapsulant on the side surfaces of the semiconductor die. Again, the large inter-die spacing reduces the die yield per wafer and increases overall manufacturing cost.